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Programmable Array Logic (PAL) refers to a family of fuse-programmable logic integrated circuits originally developed by Monolithic Memories. Registered or combinatorial output functions are modeled in a sum of products form. Each output is a sum (logical or) of a fixed number of products (logical and) of the input signals. This structure is well suited for automatic generation of programming patterns by logic compilers.

Description

PAL devices are traditionally programmed by blowing the fuses permanently through the use of overvoltage, like programmable read-only memory (PROM) chips.[1]

Alternatives

Complex programmable logic devices (CPLDs) have since become available, which are based on the same original architecture and incorporate the equivalent of several PAL chips. However, simpler PAL chips remained popular due to their high speed. Generic array logic (GAL) devices are reprogrammable and contain more logic gates.[1]

References

  1. ↑ 1.0 1.1 Programmable Array Logic at the Free On-Line Dictionary Of Computing. 2006-04-29.

External links

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